Semiconductor devices have become more highly integrated, power voltages for semiconductor devices have been reduced, and thicknesses of gate-oxide layers have been reduced. As a result, a semiconductor device having relatively thin gate-oxide structures may use power supply voltages less than 5 volts. Other semiconductor devices connected to an input of a low voltage device, however, may continue to use a 5 volt power supply. Accordingly, an integrated circuit device using a power supply less than 5 volts and capable of tolerating an input signal higher than 5 volts may be desired so that the integrated circuit device may interface with a semiconductor device having a 5 volt power voltage.
FIG. 9 is a block diagram illustrating a conventional tolerant input circuit. Referring FIG. 9, the conventional input tolerant circuit includes a first NMOS transistor ANM1, a second NMOS transistor ANM2, a first PMOS transistor AP1, a second PMOS transistor AP2 and a buffer.
As shown in FIG. 9, a supply voltage VDD is in a range between approximately 1.3 volts (V) to approximately 1.8 volts, and an input voltage is in a range between approximately 4.5 volts to approximately 5.5 volts. When the conventional tolerant input circuit includes 3 volt MOS transistors, the 3 volt MOS transistors may tolerate up to 3.6 volts without breakdown. In other words, a maximum tolerating (or withstanding) voltage of a 3 volt MOS transistor is approximately 3.6 volts. However, when the supply voltage is approximately 1.3 volts and the input voltage is approximately 5.5 volts, a voltage difference between a gate and a drain of the NMOS transistor ANM1 and a voltage difference between a gate and a drain of the PMOS transistor AP1 may be higher than approximately 3.6 volts. As a result, the NMOS transistor ANM1 and the PMOS transistor AP1 may breakdown.
A voltage of a second node AN2 is (VDD−VTH). VTH is referred to as a threshold voltage of the NMOS transistor ANM1. For example, when the threshold voltage (VTH) is approximately 0.7 volts, the second node voltage is approximately 0.9 volts. The second node voltage may be lower than approximately 0.9 volts due to a body effect of the NMOS transistor ANM1. As a result, the NMOS transistor ANM2 as well as the PMOS transistor AP1 may be turned on. In other words, the tolerant input circuit may no longer perform switching operations. Therefore, the conventional tolerant input circuit may not be proper for a semiconductor input circuit that needs to tolerate an input voltage not less than approximately 4.5 volts when the supply voltage is less than approximately 2 volts.